Noise Source Mk2

 Having built a prototype noise source and weighed up its performance I'm almost ready to design a new version. This should enable further experimentation possibly including adding a third stage of amplification and maybe a high impedance buffer between the zener diode noise generator and the input to the amplifier. The first step will be to construct the two-stage amplifier. This will be done using a couple of printed circuit adaptor boards supported over a small piece of tin using 100nF decoupling capacitors.

If the high impedance buffer is a dual gate BF998 perhaps g2 can be used as an AVC point set to keep the output at a safe level for using with a Rigol DSA815 having a +20dBm max rating.. Although the output at any given frequency is about -40dBm, the total output power is greater than 0dBm, so if 20dB more gain is used the output gets a little high. I've already noticed the Rigol complains when the noise source is turned on. First though, I need to test the result of adding a FET buffer stage.



 The SOT143b FET is mounted on the tiny pcb, bottom left. It's supported by soldering the source, g1 and g2 resistors directly to the tin plate with the top right connection linked to the 100nF capactor feeding A1. The tiny zener diode noise generator is fed by the 1.3K resistor and connects via a 100nF capacitor to the lower right connection, g1. As it stands the green drain wire connection (top left) has not yet been added and g2 (bottom left) is grounded via a 47K resistor. Later I added a 100K resistor to the 7.2 volt supply to bias g2 slightly higher so the FET would draw more current.

 I measured the supply at 7.57 volts and the source at 280mV which means the FET is drawing 2.8mA. These FET devices are not dissimilar to thermionic valves and in this example is quite similar to a tetrode because as g2 voltage is raised the transistor draws more current. The benefit of using a FET is the device draws very low grid circuit current thus the zener noise output isn't damped as previously. As shown opposite however the circuit, being equivalent to a cathode-follower provides no voltage gain.

Initial tests showed a tendency to instability, probably due to the rough layout, but the HF response seemed much better as the higher frequency components of the noise from the zener are not being damped as much.

A quick check using an SDR set to a baseline of -155dBm showed a noise level of -116dBm from about 100KHz to a couple of GHz. However, my HP power meter showed exactly 1mW or 0dBm total power which is marginally less than before (1.15mW) without the FET buffer. In the test I measured the source voltage as 280mV and G2 voltage as 2.38 volts. These figures line up well with those in Fig 6 of the FET spec, supporting a drain current of 2.8mA.

It's possible to add some voltage amplification (say 10dB) by inserting a drain load resistor of say 330 ohms and using the drain rather than the source (with drain voltage about 6 volts).


 Testing revealed that the lid of the diecast box needed to be fastened surely to eliminate instability and at frequencies in the GHz region there was a some oscillation taking place, no doubt due to poorly laid out grounding. Looking at the results using the SDR.. the noise level is now uniform across the whole test range (which perhaps implies undesired resonance previously between the zener and the first amplifier stage), but less in amplitude (previously I'd measured about -90dBm noise and now -116dBm). The follower circuit does not in fact produce a unity voltage gain, but a small loss (confirmed by the total power reading of 1mW compared with 1.15mW). Providing the circuit is stable, arranging the FET as a low gain voltage amplifier might compensate for this.. Interestingly the zener power output seems to be relatively unchanged, staying much the same no matter whether connected directly to the first amplifier or the FET buffer.


 For the next experiment I connected the FET to provide a little voltage gain. The drain voltage measured 6.28 volts so with the 390 ohm load this represents a drain current of about 3mA. I set the SDR baseline to-160dBm and found the noise output was a constant -125dBm from 100KHz to 60MHz Then above 60MHz it increased to -100dBm where it remained up to 250MHz before dropping continuously with frequency. The circuitry of the FET stage must have an inherent resonance which in this layout makes it unusable.

The end result, after looking at the performance of the buffer stage in both configurations, I believe it's addition, at least as an amplifier is the wrong approach and reverting to the follower circuit and/or different changes to the original design may be more rewarding. What is clear though is the way the noise source works in practice provides a built-in way of monitoring its performance, particularly in identifying circuit resonances.


 I investigated the noise source using the circuit above with my SDR and found its behaviour to be fine up to 250MHz, but for an odd reason the noise output dropped sharply before re-appearing and fairly constant up to well over 1.5GHz, but at all frequencies the output level seemed to be weaker than the original (bufferless) prototype. I changed the buffer circuit, making it a follower rather than an amplifier and checked its operation again. During this change I removed the tin shield above A1 in order to resolder the input capacitor. I also fitted the g2 100nF decoupling capacitor directly to ground instead of to the A1 tin shield which I'd used for convenience. I measured its RF output and found it was much lower than before (bufferless). It had been exactly 1mW but was now reading only about 0.5mW. I removed the lid and was able to ground g2. On doing this the output rose to about 1.5mW so I cut the feed to the 100K bias resistor and found the output was now just a little under 1mW. A further test using the SDR showed the performance was virtually the same as before (with the FET as an amplifier) except the noise output was slightly greater over the whole frequency range but still exhibited the steep cut off at a little over 250MHz. The next test may be to directly ground g2. If that fails to improve the performance especially in terms of the apparent resonance at 250MHz I'll remove the FET buffer. I had assumed the zener noise may be damped by the input of A1 but experiments appear to indicate this may not be the case. Maybe the zener impedance is pretty low.. theoretically it might merely be simply related to its terminal voltage of 5.1 volts and the zener current of 1.6mA = 3K, although AC-wise the 1.3K load resistor must also be considered, making about 900 ohms. If the zener current was increased, what would its impedance be? Reducing the load to half would result in a zener current of 3.2mA and a zener impedance of 1.5K and a rough AC impedance of 450 ohms. These figures do not take account however of the RF impedance of the zener itself. As the designers didn't intend the device to be used as a noise source we can't directly use the spec for the zener, however there are some clues given such as its capacitance which is very roughly 100pF. Given that value we could say that this results in an RF impedance of say 15K at 100KHz, 160 ohms at 10MHz and only 8 ohms at 250 MHz. What isn't readily available however is any clue to the the level of avalanche noise from the zener at any given frequency. This might rise dramatically at VHF which might be the case given the initial results from the noise source? We can say though that the RF impedance of the zener is pretty variable across the test range I'm looking at. In fact, because of lots of unknown facts the only way to proceed is by experiment and so far I reckon the original circuit without the FET buffer is giving the better results.

One clue to the zener noise output is the fact that even slight parasitic capacitance at the zener-resistor junction does result in a significant reduction in noise output. That might mean that the zener capacitance of 100pF is not a relevant figure in its avalanche noise output. That being the case some experimentation with zener current may be a good approach. As I've already explained the total noise output from the noise source must not exceed a figure of +20dBm and to be safe let's say +10dBm. It's already 1mW or 0dBm and I've seen 1.5mW (+2dBm) during experiments so a figure of less than 10mW should therefore be the target. If -40dBm is the average level of indicated noise at any given frequency then -30dBm will be the final aim.

 After grounding g2 I decided the FET buffer wasn't providing any advantage at all compared with the original design so unsoldered it, and moved the zener closer to A1 input. I then checked the RF output and found it measured 0.9mW, a little less than earlier results but quite possibly because the battery voltage was slightly lower than it had been for initial tests. The table shows the noise at spot frequencies using my SDR-Play at the same gain settings throughout with the Difference figures added to compensate for changing SDR performance. No real resonance effects were apparent and figures are close, but slightly down on the first prototype, although as I suggested the battery voltage will be down slightly. The next step is to measure the true noise output using the Rigol spectrum analyser as the table merely gives signal strengths with the SDR gain settings fixed to give comparative readings. The noise source matches the SDR input nicely as inserting a 20dB attenuator reduced the noise level from-100dBm to -120dBm at 10MHz.











 Baseline dBm










 Indicated Power dBm










 Difference dB










  A quick check on the Rigol showed a reasonably flat noise output of -62dBm +/- 3dB from low frequencies up to over 1GHz with a very sharp resonance at 1.17GHz then flattening back up to the maximum Rigol frequency of 1.5GHz. Note that the indicated power level varied from -40dBm to -60dBm as the Rigol scan reduced from 3KHz to 300Hz.


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